The present invention relates to direct memory access in a data processing system, and specifically to controlling direct memory access using a user-programmable algorithm.
Direct Memory Access (DMA) controllers are used in computer systems to offload repetitive data movement tasks from a processor in a data processing system. As the demand for increased performance of the processor, or central processing unit (CPU), increases so does the need for high-throughput, flexible DMAs that work well with these processors. Original DMA controllers (DMACs) used only registers or memory storage devices to specify source, destination, and length of data to be transferred. The DMAC was coupled to only one source device. Soon the need to carry out simultaneous block transfers led to the development of multi-channel DMACs that achieved the effect of performing several data movements simultaneously. As data transfer rates continued to increase, set up, service and interrupt overhead for the DMACs became too high, especially when the DMAC was programmed for a single contiguous block of memory per interrupt.
To overcome these overhead issues, descriptor-based DMACs were introduced. As the computer system complexity increased, so the DMACs increased in complexity. Today, some DMACs use a dedicated processor to perform such complex functions. The dedicated processor, or coprocessor, is often based on a reduced instruction set computer (RISC) methodology. Such coprocessors operate on increasingly complex protocols, and often provide algorithmic support, such as digital filtering operations. The algorithmic support is critical to many applications where data movement and calculation rates are high. This is particularly true of entertainment applications, such as video, graphic and audio applications, and is also important in areas such as audio and visual decompression calculations. While the need for flexible algorithmic manipulation of data by the DMAC increases, the coprocessor becomes less attractive as it operates on a data-structure descriptor architecture which has limited flexibility and it can not achieve the high performance of the dedicated state machine of a traditional DMAC.
Therefore, there is a need for a DMAC that provides algorithmic support using descriptors that define DMA algorithms instead of data structures. Additionally, there is a need for a flexible method of programming a DMAC with simple building blocks. Further, a need exists for a method of programming a DMAC that allows easy expansion for additional and complex data manipulations.
Still further, as imaging and entertainment applications continue to move and manipulate large amounts of data in a variety of ways, there is a need to allow the user to specify the functions done in a DMA, and a further need to increase the throughput capabilities of a DMA to accommodate the ever increasing data sizes.